SPANKy summary
SPANKy!
Brought to you by group GAMMA:
Victoria Smith (vics@rice.edu)
Mara Prandi-Abrams (mabrams@rice.edu)
Dennis Geels (geels@rice.edu)
Overview -
Functional Specifications -
ISA -
Controller -
Design and Layout -
Performance Analysis -
Summary
Project Summary and References
The design for our microprocessor was partially influenced by our 327 project,
but was mostly a straightforward implementation of a RISC register to register
architecture. We also got ideas for the layout of our barrel shifter from our
textbook by Weste.
The work was very equitably shared amoung our group members. Dennis and Vicki
worked on the initial design, and Dennis did almost all subsequent refinements
of that design. The lower-level subcells were divided as follows:
Dennis:
- branch unit
- barrel shifter
- controller
Mara:
- decoder
- mux
- phil, the logic block
Vicki:
- adder
- incrementor
- register
- master-slave latches
Mara put together the instruction register/decoder block; Dennis put together
the pc loop. Vicki put together the ALU, the register file, and did most of
the routing. Mara and Vicki did the bulk of the circuit debugging. Dennis
wrote and assembled the multiplication process that we used to test the entire
block. All three of us tested and debugged spanky at the highest level;
everyone tested their own blocks extensively. Mara did the bulk of the timing
analysis and presentation preparation. Dennis maintained the webpage.
Comments and Suggestions
While the gamma group very much enjoyed this project, we feel that we would
have benefitted from better CAD tools and/or better documentation of existing
tools. While the paperwork was voluminous, it was poorly indexed and often
out of date. Many of the tools could have been fully explained in one page. Also
spice really needs to be introduced earlier in the course so that groups do
not have to make last-minute basic layout changes that may affect the entire
hierarchy. We also think that the groups should have been encouraged to draw
their own n-wells so as to avoid the drc errors when the final design is
flattened.