SPANKy is for lovers
SPANKy!
Brought to you by group GAMMA:
Victoria Smith (vics@rice.edu)
Mara Prandi-Abrams (mabrams@rice.edu)
Dennis Geels (geels@rice.edu)
Overview -
Functional Specifications -
ISA -
Controller -
Design and Layout -
Performance Analysis -
Summary
Overview
SPANKy is an eight-bit RISC CPU, designed as part of the VLSI course here at
Rice University. It has a full range of basic arithmetic and logical
operations, can address a total of 512 bytes of memory, and allows for limited
user interaction.
We designed the architecture with functionality and simplicity as the two main
goals. In keeping with the RISC tradition, SPANKy is a load-store
architecture, has uniform-length instructions, and even comes with extremely
short mnemonics for the SPANKy assembly language.
SPANKy