.: ELEC 220 :: Project 2 :. .: Kyle Ringgenberg :: Paul Campbell :. ********************************** LC1 [+cache] ********************************* ********************************** LC1 [-cache] ********************************* Included with this READ-ME are the following files: 1) lc1sim.asm :: This is the assembly language file that implements the simulation of the LC1 computer in the LC3 language and simulated hardware. The following commands are allowed in LC1: CALL, RET, ADD, BRn, LD, ST, STOP, TRAP. Note, that the header of this file sets a value named "DEBUG" which, by default, should be set to 0! If debugging is necessary, simply change the code at the top of the page such that DEBUG=1. 2) lc1traps.asm :: This is the assembly language file that implements the trap codes of the LC1 computer within our own simulator. Trap codes that are allowed include: x00 :: STOP :: Print the message "Stopping the LC-1 simulator." to the console and stop execution. x01 :: GETC :: Read a single character from the LC-1 keyboard. The character is not echoed onto the console. Its ASCII code (0-extended) is copied into ACC, the LC-1 accumulator. x02 :: OUT :: Write a character in ACC[7:0] to the console display. x03 :: PUTS :: Write a string of ASCII characters to the console display. The characters are contained in consecutive memory locations, one character per memory location, starting with the address located in ACC, the LC-1 accumulator. Writing terminates with the occurrence of a negative value in a memory location. x04 :: NOT :: Perform a bit-wise NOT on the value in ACC, the LC-1 accumulator, and place the result in ACC. Note: Code provided. x05 :: AND :: Perform a bit-wise AND on the values located in two consecutive memory locations specified by the address in ACC, the LC-1 accumulator. Place the result in ACC. x06 :: LDR :: Get the value located at the address in ACC, the LC-1 accumulator, and put it in the ACC. 3) test_7_inst :: This is a modified version of the provided test case which checks all 7 of the allowed commands. It also serves to test the stack implementations of our simulator. 4) test_trap_[and, getc, ldr, not, out, puts, stop] :: Modified versions of the supplied test code which, when treated as a whole, test all possible trap routines and various stack issues. Our system passes all* of these tests accurately. 5) dp.png & sm.png :: These are scanned images of our completed Data Path and State Machine drawings (respectively). We've chosen to include these digitally so that the entire project may be turned in at once, with no separation in parts. If there are any issues reading the images, please contact us at: kringg@rice.edu & pcsoup@rice.edu so that we may present the original hardcopies for grading. Special NOtes: 1) We have included the compilied components of all these files so that they can be run immediately rather than waiting to compile each one individually. These additional files are up-to-date with the *.asm files that, in the event of a descrepency, should be treated as our "final answer". 2) For some unknown reason, we were unable to implement the AND TRAP. We firmly believe that our algorythm is correct, and the whole of the code is accurate. For some reason, however, we were never able to determine why the system was never able to run to completetion as expected. We feel that there is a chance that, considering the buggy history of the LC3 simulator, this may or may not have some bearing on this issue. We've put in multiple hours on this component alone, and couldn't come to any conclusions. Therefore, if this projected is graded on automatic tests, as some COMP-style projects are, we ask that our given code at least be considered on the basis of partial credit due to its reasonably correct nature. ********************************** LC1 [Testing] ********************************* Using Test Programs: Simply load the *.obj files into the LC3 simulator according to the following fashion: 1) lc3traps.obj 2) [test_case].obj 3) lc3sim.obj Then hit execute as per usual. Note: you may need to check the comments in the test cases so as to know what sort of outcome to expect. Ie: Not everything will print to the console! ********************************** LC1 [Contact] ********************************* If you encounter any other issues, please feel free to contact us at: kringg@rice.edu pcsoup@rice.edu