Welcome to the Advanced VLSI Design class at Rice University

ELEC 522 at Rice is designed to build upon ELEC 422 VLSI Design I. The goals of the course are to study design methodologies for application-specific processors for applications particularly in wireless communications. The course includes a design project. In some years, chips may be fabricated by MOSIS, or implemented on an FPGA.

VLSI Design Faculty:
- Joe Cavallaro

Handouts

From ASIC to ASIP: The Next Design Discontinuity
Week 2
Communication Processors

Homework Assignments

Approximately 5 Assignments on ASIC and FPGA Design using Mentor Graphics and Xilinx tools along with LabVIEW FPGA.

Projects for Fall 2005

Final group design project to be implemented on an FPGA, and also targeted to an ASIC library. Possible fabrication through the MOSIS service. A presentation will be given in class on the project, and additional presentations of research papers will be assigned for discussion.

Course Contents

The topics covered in this course include:

Design methodology for ASIC and FPGA implementations.
High-level VLSI synthesis and design tools including Mentor Graphics, with CAD algorithm overview for floorplanning, placement, and routing.
FPGA hardware structures and fabrics.
Languages for VLSI synthesis including VHDL.
High-level DSP algorithm simulation and code (VHDL) generation using Xilinx StateCAD, LabVIEW FPGA, and ModelSim.
CAD algorithm overview for floorplanning, placement, and routing.
Design and analysis of algorithm-specific VLSI processor architectures. Topics include the implementation of pipelined and systolic processor structure. Techniques for mapping numerical algorithms onto custom processor arrays, including Application Specific Instruction Processors (ASIPs).
Design tools for ASIP processors including the Transport Triggered Architecture.
High-level Design frameworks for systems containing custom and general-purpose units.
Prototyping using LabVIEW FPGA, Xilinx ISE tools and Xilinx FPGAs.
Adaptive computing as a technology for reconfigurable wireless systems. Example architectures: Blackfin, TigerSHARC, XPP, Sandblaster, TI TCI platform, and picoArray.
Heterogeneous DSP-FPGA-ASIC processors and system partitioning

Prerequisites

Introductory VLSI System Design, Elec 422 or a course using a VLSI layout editor.

Course Materials

Wayne Wolf, “FPGA-Based System Design,” Prentice Hall, 2004, ISBN 0-13-142461-0. Emphasis on Chapters 1, 3, 6, 7 (about 250 pages).
Walter Tuttlebee, Editor, “Software Defined Radio, Baseband Technology for 3G Handsets and Basestations,” John Wiley and Sons, 2004, ISBN 0-470-86770-1. Emphasis on Chapters 1, 2, 3, 4, 5, 6, 7, 10, 11. (about 250 pages). Some of these may be seminar presentations.
Xilinx System Generator On-Line User Guide at http://www.xilinx.com/products/software/sysgen/app_docs/user_guide.htm
National Instruments LabVIEW FPGA User Manuals at http://digital.ni.com/manuals.nsf/MainPage?ReadForm&node=132020_US
Michael J.S. Smith, ``Application-Specific Integrated Circuits,'' Addison Wesley, 1997, ISBN 0-201-50022-1. Amazon.com info
Current research papers and design tool tutorials to be distributed in class.

Joe Cavallaro

Last modified: 30 August 2005