Elec 422: VLSI Design I
Rice University
HSPICE Simulation from Magic
Layout
2003 Update No. 2
Additional Notes on Spice simulation:
If you are using Xwin32 on a PC to access hspice and awaves, please note that some of the icons will not appear if “backing store” and “pseudo-color” modes are enabled on the PC X server. You can go to the X configuration utility on the PC to disable these features of the X server, and it should not cause problems with other applications. It does force the server to redraw the screen more frequently.
Use the shell script “pspicetool_0_5” in /usr/site/cad/bin to prepare your spice input files.
The shell script builds an output “.sp” file for hspice to run by joining your transistor netlist with models of the transistors and with the experiment that you want to run.
The shell script looks for the extractor output files of magic_05 (.ext files) and builds a spice format file. It also concatenates transistor “models” from the library location,
/usr/site/cad/lib/spice and uses a typical “models_0_5” from MOSIS. It then looks for an experiment file with “.exp” file extension.
An example folder is at /home/cavallar/demo/hspice/test0_5
The buffer3.sp file is included below:
* HSPICE file created from buffer3.ext - technology: scmos
.option scale=0.3u
m0 Vdd out4 outfinal Vdd pfet w=6 l=2
+ ad=432 pd=188 as=30 ps=22
m1 outfinal out4 GND Gnd nfet w=3 l=2
+ ad=19 pd=18 as=228 ps=140
m2 Vdd out2 out4 Vdd pfet w=24 l=2
+ ad=0 pd=0 as=120 ps=58
m3 out4 out2 GND Gnd nfet w=12 l=2
+ ad=60 pd=34 as=0 ps=0
m4 Vdd out1 out2 Vdd pfet w=12 l=2
+ ad=0 pd=0 as=60 ps=34
m5 out2 out1 GND Gnd nfet w=6 l=2
+ ad=30 pd=22 as=0 ps=0
m6 Vdd outpre out1 Vdd pfet w=6 l=2
+ ad=0 pd=0 as=30 ps=22
m7 out1 outpre GND Gnd nfet w=3 l=2
+ ad=19 pd=18 as=0 ps=0
m8 Vdd in outpre Vdd pfet w=6 l=2
+ ad=0 pd=0 as=30 ps=22
m9 outpre in GND Gnd nfet w=3 l=2
+ ad=19 pd=18 as=0 ps=0
C0 outpre GND 3.8fF
C1 out1 GND 3.7fF
C2 out2 GND 4.1fF
C3 out4 GND 5.5fF
C4 Vdd GND 7.4fF
** hspice subcircuit dictionary
*MOSIS file ami-c5n/t07o-params.txt
*
*MOSIS model names changed to nfet and pfet to match
hspice output of ext2spice
*
* MOSIS PARAMETRIC TEST RESULTS
*
* RUN:
T07O VENDOR: AMI
* TECHNOLOGY:
SCN05
FEATURE SIZE: 0.5 microns
*T07O SPICE BSIM3 VERSION 3.1 PARAMETERS
*
*SPICE 3f5 Level 8, Star-HSPICE Level 49, UTMOST Level 8
*
* DATE: Nov 10/00
* LOT: T07O
WAF: 04
* Temperature_parameters=Default
.MODEL nfet NMOS ( LEVEL = 49
+VERSION = 3.1
TNOM = 27 TOX = 1.39E-8
+XJ =
1.5E-7 NCH = 1.7E17 VTH0 = 0.6729745
+K1 = 0.8857626 K2 =
-0.1056665 K3 = 26.1393253
+K3B =
-10.8575063 W0 = 1E-8 NLX = 1E-9
+DVT0W = 0 DVT1W = 0
DVT2W = 0
+DVT0 =
3.5336064 DVT1 = 0.4042584 DVT2 = -0.08021
+U0 =
469.4285401 UA = 2.10725E-11 UB = 1.563938E-18
+UC =
8.351302E-12 VSAT = 1.447392E5 A0 = 0.4860146
+AGS =
0.1183951 B0 = 3.11784E-6 B1 = 5E-6
+KETA =
-2.007859E-3 A1 = 1.987057E-5 A2 = 0.4464424
+RDSW =
1.625754E3 PRWG = -3.572517E-3 PRWB = 0.028757
+WR = 1 WINT = 2.80838E-7
LINT = 3.595174E-8
+XL = 0 XW = 0
DWG = -1.950624E-8
+DWB =
2.569541E-8 VOFF = -6.125048E-3 NFACTOR = 0.9638011
+CIT = 0 CDSC = 2.4E-4
CDSCD = 0
+CDSCB = 0 ETA0 = 0.0102913
ETAB = -1.732998E-3
+DSUB =
0.2070436 PCLM = 2.1925069 PDIBLC1 = -0.2021569
+PDIBLC2 = 2.382395E-3
PDIBLCB = -0.0552834
DROUT = 0.5225033
+PSCBE1 =
5.40685E8 PSCBE2 = 3.666504E-5 PVAG = 0
+DELTA =
0.01 RSH = 81.6 MOBMOD = 1
+PRT = 0 UTE = -1.5
KT1 = -0.11
+KT1L = 0 KT2 = 0.022
UA1 = 4.31E-9
+UB1 =
-7.61E-18 UC1 = -5.6E-11 AT = 3.3E4
+WL = 0 WLN = 1
WW = 0
+WWN = 1 WWL = -6.554E-20
LL = 0
+LLN = 1 LW = 0
LWN = 1
+LWL =
-9.461E-20 CAPMOD = 2 XPART = 0.4
+CGDO =
2.11E-10 CGSO = 2.11E-10 CGBO = 1E-9
+CJ =
4.260365E-4 PB = 0.9809969 MJ = 0.4412537
+CJSW =
3.625653E-10 PBSW = 0.1 MJSW =
0.1210159
+CF = 0 PVTH0 = -0.1221527
PRDSW = 112.9130044
+PK2 =
-7.891707E-3 WKETA = -0.0230494 LKETA = 5.65745E-3 )
*
.MODEL pfet PMOS ( LEVEL = 49
+VERSION = 3.1
TNOM = 27 TOX = 1.39E-8
+XJ =
1.5E-7 NCH = 1.7E17 VTH0 =
-0.9684673
+K1 =
0.5331779 K2 = 6.950203E-3 K3 = 6.4384178
+K3B =
-1.3760315 W0 = 1E-8 NLX =
2.21333E-9
+DVT0W = 0 DVT1W = 0
DVT2W = 0
+DVT0 =
2.699099 DVT1 = 0.5197659 DVT2 = -0.0689685
+U0 = 264.2858843 UA
= 4.136726E-9 UB = 1E-21
+UC =
-5.29547E-11 VSAT = 2E5 A0 =
0.8044956
+AGS =
0.1683435 B0 = 1.449149E-6 B1 = 5E-6
+KETA =
-8.247028E-4 A1 = 0 A2 =
0.3163358
+RDSW = 3E3 PRWG = -0.0543748
PRWB = -0.0474514
+WR = 1 WINT = 3.436942E-7
LINT = 2.836861E-8
+XL = 0 XW = 0
DWG = -3.621119E-8
+DWB =
1.182645E-8 VOFF = -0.0730841 NFACTOR = 0.8762183
+CIT = 0 CDSC = 2.4E-4
CDSCD = 0
+CDSCB = 0 ETA0 = 1.001652E-3
ETAB = -2.488221E-4
+DSUB =
0.0633008 PCLM = 2.0820558 PDIBLC1 = 0.0926722
+PDIBLC2 = 3.001728E-3
PDIBLCB = -0.063685
DROUT = 0.312949
+PSCBE1 =
5.100703E9 PSCBE2 = 5E-10 PVAG =
0.2728406
+DELTA =
0.01 RSH = 112.8 MOBMOD = 1
+PRT = 0 UTE = -1.5
KT1 = -0.11
+KT1L = 0 KT2 = 0.022
UA1 = 4.31E-9
+UB1 =
-7.61E-18 UC1 = -5.6E-11 AT = 3.3E4
+WL = 0 WLN = 1
WW = 0
+WWN = 1 WWL = -1.205E-20
LL = 0
+LLN = 1 LW = 0
LWN = 1
+LWL =
6.268E-21 CAPMOD = 2 XPART = 0.4
+CGDO =
2.19E-10 CGSO = 2.19E-10 CGBO = 1E-9
+CJ =
7.258139E-4 PB = 0.9624504 MJ = 0.4957587
+CJSW =
2.376551E-10 PBSW = 0.99 MJSW =
0.2961028
+CF = 0 PVTH0 = 5.98016E-3
PRDSW = 14.8598424
+PK2 =
3.73981E-3 WKETA = -4.58295E-4 LKETA =
-3.356052E-3 )
*
*
* Elec422 SPICE EXPERIMENT TEMPLATE;
* J. Cavallaro, updated 11/2000,
* ------------------------------------
.option post
* Set BASIC VOLTAGE levels
vdd Vdd GND dc 5
* set substrate voltages : P-sub = Vdd; N-sub = GND
vs1 CMOSP Vdd dc 0
vs2 CMOSN GND dc 0
* ------------------------------------
* Set other constant circuit inputs, for example b, cin:
* None here.
* ------------------------------------
* Set Circuit Input which will change, for example a:
* input pulse between node and GND (initially 0 ) of:
* pulse (init_value pulse_value delay rise_time fall_time
pulse_width period)
vin in GND 0 pulse(0 5 0ns 0.1ns 0.1ns 4.8ns 10ns)
* ------------------------------------
* Do analysis: give increments and total time for
analysis.
.tran .1ns 10ns
.end