Elec 422: VLSI Design I
Fall 2003
Final MOSIS Project Paper Checklist.
Please
refer to the companion Final Notes document for more details. Please complete
this checklist, print it out, and attach your “Division of Work” statement, sign
by all group members and return to me no later than 5 pm Tuesday December 9,
2003.
Please
check the boxes below to indicate that you have completed these items and/or
sent the electronic files to me by e-mail.
q
MOSIS Project Description
q
Final CIF File
and Location
q
Project
PowerPoint Presentation from AMD contest for archiving
q Web Page status. Please send e-mail when complete
q Additional Materials – I/O Pin list
q
Final Irsim –
Test vector files and Postscript Results
Final Project Checks- Important Items to verify:
q Verify Vdd and GND connectivity
q Make sure that the Vdd strap in the PLA is connected.
q Extractor warnings and warnings from ext2sim resolved for Vdd, GND, clka, clkb. Please justify any unresolved warnings here.
-----------------------------------------------------------------------------------------
q Verify that the PLA description does not
contain any same state loops
q Verify
that there are no Design Rule Errors and that all well and substrate contact
issues have been fixed.
q
Verify that there are no substrate contacts of the
wrong polarity.
q
Verify the MOSIS minimum density rules which 15% for
poly and 30% for metal1 and metal2 layers; indicate percentages here: Poly ___
, M1 ___ M2 ___
q Please fix about any logos that produce design rule errors.
Please Attach SIGNED “Division of Work” Statement here.