Rice University

Elec 422, VLSI Design I

Project Milestones, Fall 2003

 

Date

Week

Milestone

 

 

                                         

Aug. 28

1

Group Formation

Sept.2

2

Initial Project Idea – One Page Text and Block Diagram

Sept. 2 - 5

2

Project Discussion during Office Hours

Sept. 9

3

Two Page Functional Description and Start of Project Web page

Sept. 9 - 12

3

Project Discussion during Office Hours

Sept. 11

3

Presentation of Project to AMD Sponsors

Sept. 16

4

Initial Logic, Algorithm Flow, and Schedule Due

Sept. 16 - 19

4

Project Discussion during Office Hours

Sept. 23

5

PLA Finite State Machine, Control and Timing Description Due

Sept. 23 - 26

5

Project Discussion during Office Hours

Sept. 30

6

Initial Floorplan and Basic Circuit Sub-Cell Mask Layout Due

Sept. 30 – Oct. 3

6

Project Discussion during Office Hours

Oct. 7

7

Mid-Semester Project Status Report Due

Oct. 7 - 10

7

Mid-Semester Project Discussion during Office Hours

Oct. 14

8

Fall Break

Oct. 21

9

Datapath Circuit Module (eg. Adder, Multiplier) Mask Layout Due

Oct. 21 - 24

9

Project Discussion during Office Hours

Oct. 28

10

System Integration, Floorplan, I/O Pads Placement Due

Nov. 6

11

Mid-Term Exam, Take-home

Nov. 11

12

System Routing, System Simulation and Verification Plan Due

Nov. 11 - 14

12

Project Discussion during Office Hours

Nov. 18

13

Final Electrical Rules Checks and Preliminary CIF Due

Nov. 18 - 21

13

Final Design Evaluation of Layout during Office Hours

Nov. 25

14

Revised CIF Layout Due

Dec. 2

15

Final Simulations, Design Rule Check of Layout, and Checklist Due

Dec. 4

15

Project Presentation to Class and AMD Design Contest

Dec. 5

15

Final Layout CIF file, Project Report, and WWW Page Due

Dec. 8

 

Final Layout CIF file Due at MOSIS 0.5 micron Process