April 20, 2001 [updated August 20, 2001] AMI ABN pads "40pc22x22-zenerfree-ver0.4" This release is an unvalidated fix of version "40pc22x22-stuffed-new-ver0.3" (document appended below). This fix ("40pc22x22-zenerfree-ver0.4") has not been made available in MAGIC format. Only the provided CIF and GDS formats are available, together with this document ("scn16-pads-ver0.4.txt"). These pads have *NOT* been validated by the MOSIS System of USC/ISI. Use of these pad layouts is done solely at the user's risk. However, these pads have a solid fabrication history over many projects, so MOSIS will continue to make these pad layouts available. Modified pads are not to be referred to as "MOSIS Pads" unless prior agreement is obtained from USC/ISI. Warnings. * do NOT use digital pads ("in", "io", "out") for analog signals. In particular, the "io" pad has been improperly used by analog designers (the layout weakness fixed here was uncovered that way). * This fix has shifted the origins of the padcells, so the pads in this library are no longer position-compatible with the previous version. If the new pads are used with an earlier design, you will have to re-route your cell core to the new padframe. * as before, all padstacks are marked with the "XP" layer. If you wish to place a pad, such as "blank", and do not want MOSIS to bond to it, then remove the "XP" polygon from its padstack. You might consider creating a spacer pad by copying the "blank" pad, and removing the padstack from it. * please remember that the supplied padframes are EXAMPLES only. MOSIS does not enforce any particular arrangement of pads. For example: in the middle of the top row of the "40p2200" padframe, you will find a GND pad, between the two "cv" corner pads (which connect to VDD); a similar situation is on the bottom row, with a VDD pad positioned between the two "cg" (corner GND) pads. If you don't want this arrangement, you are free to change it ! Compatibilities: * all ten pads available in the previous fix (analog, blank, cg, cv, gnd, in, io, out, power, vdd) are available and their functionality is unchanged. * the example 40-pin padframes have the same outside dimensions as before (2203.2 by 2203.2 microns), however internal-pad to corner-pad overlap is now 3.5 lambda on both sides. Pad pitch remains 200 um (250 lambda). Improvements: * padframes may now be laid out by setting the drawing environment to a hard grid of 200 um. pads will be properly placed if pad instance origins (including corner pads) are exactly on the 200 um grid. * the "in", "io" and "out" pads contained a lateral diode which apparently broke down under reverse bias at voltages less than 5 volts, under certain conditions. This diode has been eliminated, in all three pads. * a polygon in CIF "CX" layer (layer 0,0 in GDS) has been placed into each cell, to help those who are assembling their own padframe. These rectangles should abut and align exactly. (Those polygons should be removed prior to submitting to MOSIS.) * other features in the pads, which used to cause "abutting actives not at same potential" DRC connectivity violations, have been removed. DRC flags which still occur: Example padframe "40p2200_mixed" normally generates the following DRC flags. If you see similar flags, please do NOT contact MOSIS about them. We are aware of them, and we consider them benign: *** Summary of rule violation for cell "40p2200_mixed layout" *** cnt um Violated Rules --- --- -------------- 120 2.4 [Mosis 5.7.b] multiple min-enc poly1-cuts sep'n from active 456 2.4 [Mosis 6.7.b] multiple min-enc active-cuts sep'n from poly1 72 2.4 [using Mosis 2.1] active fragment may be too narrow 387 3.2 [Mosis 7.4] wide-feature metal-1 min separation violated 158 4.8 [Mosis 9.4] wide-feature metal-2 min separation violated 197 30.0 [Mosis 10.4] min sep'n, unrelated metal-1 to glasscut violated 14 30.0 [Mosis 10.4] min sep'n, unrelated metal-2 to glasscut violated 7 topmetal feature underlies more than one glasscut 4 poly-1 region has no contact 1415 Total errors found There are no offgrid violations, nor shorts between VDD and GND, in this padframe. If you see DRC flags such as "overlap of p+select with n+select", try mirroring the offending non-corner cell. gj +-----------------------------------------------------------------+ | USC ISI, MOSIS Service | | 4676 Admiralty Way Suite 700 | | Marina del Rey, CA 90292-6695 | | support@mosis.org http://www.mosis.org | | 310-822-1511 (tel) 310-823-5624 (fax) | +-----------------------------------------------------------------+ ===================== version 0.3 documentation ======================= jws 991109 1.6 um 2200x2200 Padframe -- version 0.3 (991109) *** NOTICE *** These pads have *NOT* been validated by the MOSIS System of USC/ISI. Any modification of these pads by the user is done solely at the user's risk. Modified pads are not to be referred to as "MOSIS Pads" unless prior agreement is obtained from USC/ISI. (*** Note to all users: BE SURE TO CHECK PRIOR TO YOUR SUBMISSION FOR ANY UPDATES TO THESE PADS ON THE MOSIS WEB SITE: http://www.mosis.org/cell-libraries/scn16-pads/ or via ftp: ftp://ftp.mosis.org/pub/mosis/cell-libraries/scn16-pads/ or in the Magic area (see below) ***) (*** Note to Magic users: *.mag files are located in the Magic area: ftp://ftp.isi.edu/pub/sondeen/magic/new/beta/examples/SCNA.80.PADS.2000/ be sure to read: http://www.isi.edu/~sondeen/magic.html ***) Contents 0. intro 1. pad adjacency (abutment) rules 2. example padframe 3. simulation notes 4. cif/gds notes 5. operation 0. Intro These experimental pads are a version of the Mosis 1.2um pads that have been ported into 1.6 um for AMIabn at lambda = 0.8, however, these pads have *NOT* been fabbed, tested, or otherwise verified. (only magic extraction to spice files, hspice simulation, and dracula DRC checking has been performed). This directory contains only scn16-pads-ver0.3.doc (README): this file 40pc22x22-stuffed-new-ver0.3.cif (40p2200.cif): cif format, 40-pin padframe 40pc22x22-stuffed-new-ver0.3.gds (40p2200.strm): gds format, 40-pin padframe The above cells are for lambda = 0.8 (SCNA.80). The following alternate directory also contains individual cell cif/gds files, as well as *.mag files (for Magic), an hspice simulation example, dracula DRC results, etc: ftp://ftp.isi.edu/pub/sondeen/magic/new/beta/examples/SCNA.80.PADS.2000/ This distribution includes .mag, .cif, and .strm (gds) files for Based on reported ESD test results for the 1.2um pads, Mosis estimates that ESD protection will be: human body model, failure voltage: all inputs and outputs: 2KV Mosis will post 1.6um pads test results when they become available. Note that these cells are not the same size as the previous scn16_pads: cell xsize(um) ysize(um) ---- ----- ----- analog blank gnd in io out power vdd 200.80 202.40 cv cg 202.40 202.40 This padset has been designed so that all pads are interchangeable, and a simple, consistent abutment rule is maintained: 1. Pad adjacency (abutment) Rules: *very Important!*: It's very easy to cause shorts by placing pads too close together, or to cause opens by placing pads too far apart; please study the example padframes before creating your own padframes (see files: 40p2200, 40p2200_ana, and 88p4600_4600). When placing pads, make sure the left/right edges of their outer metal1/metal2 boundaries overlap by 1 lambda, except to corner pads, where the overlap is 3 lambda (on one side) and 4 lambda (on the other side), both in the horizontal and vertical directions. Note: the files referred to below are found on the alternate directory: ftp://ftp.isi.edu/pub/sondeen/magic/new/beta/examples/SCNA.80.PADS.2000/ 2. example padframes: 40p2200 34 io's, 1 gnd, 1 vdd, 4 corner (2 cg, 2cv) 40p2200_ana 34 analog's, 1 gnd, 1 power, 4 corner (2 cg, 2cv) 88p4600_4600 88 io's, 40p2200_testpad 17 in's, 17 out's, 1 gnd, 1 vdd, 4 corner (2 cg, 2cv) with in's connected to out's (edit before using!) 40p2200_testpad_small 4 in's, 4 out's, 1 gnd, 1 vdd, 4 corner (2 cg, 2cv) with in's connected to out's (edit before using!) 3. Simulation notes: the sim/ directory contains simple io input and output simulations. (output into 20pF) using the Mosis level 3 and 49 models (from run n97n, file n97n.prm). the "150 ohm" resistor in the diagram below refers to the parallel combination of the following: the pdiff resistor is 3.5 squares (of nominally 75.6 ohm/sq pdiff) = ~ 264.6 ohm the ndiff esistor is 3.5 squares (of nominally 53 ohm/sq ndiff) = ~185.5 ohm magic users should see the use of resistor 'subckt's in 'sim/io.in.sp' (via 'include SCAN.80.r') and the .spice file 'm' -> 'x' (subckt call) edits in 'io.spice' (vrs. the original 'io.spice.org') 4. cif/gds notes: the cif/gds files contain the layers 'CRE/64' and 'CRD/66' which may be safely and totally ignored: they simply help magic (under techfiles like version 99e) identify were "resistors" are desired (which allows them to be extracted as special devices and simulated directly (following a simple edit of the .spice file to convert the 'm' lines into 'x' subckt calls (see ftp://ftp.isi.edu/pub/sondeen/magic/new/beta/CHANGELOG for more information))). To edit the cif file, use a text editor or a unix shell perl command like: perl -pi.bak -e s#CRD#CX# file.cif perl -pi.bak -e s#CRE#CX# file.cif 5. Operation: IO Pad (io.mag,io.cif): when enable (EN) is high (VDD), the OUT pin drives the output PAD. when enable (EN) is low (GND), the PAD is high-impedence input IN_unbuffered (INunb) always follows the PAD level input INbar (INb) always follows the PAD level with 1 inversion input IN always follows the PAD level with 2 inversions * Circuit Diagram +-----+ +----| PAD | | +-----+ +-+ | Vdd | \ +---------+ +-+ / 150 ohm | | |GND \ |+--+ +--+| ENABLE | +--0|| ||0--------- Vdd | | |+--+ +--+| | | | | | |+--+ | | +---------+-------------------0|| P | | | | |+--+ | ENABLE | |+--+ +--+| ENABLEbar | | ---------|---|| ||0--+------ +------+ | |+--+ +--+| | | | IN_unbuffered | | | | |+--+ | | +---------+-------|------------|| N +---+ | | | | |+--+ | | OUT | |+--+ +--+| | | \ / ------+---|| ||---+ GND 0 |+--+ +--+| | INbar | | +---+ +---------+ | | GND \ / 0 | IN Analog pad (analog.mag,analog.cif) the INunb pin follows the PAD level ESD protection: (1) Thick-Field Oxide transistor of size W/L= 600/3 microns, (2) 150 ohms N_diffusion resistor/diode, and (3) Tri-state output drivers as pair of diode clamps. ESD results have been reported to exceed 2000 volts (in Orbit 2.0 um fab) but these results have not been confirmed by Mosis. 991109 rev0.3: converted to use SCNA.80.tech27 971020 rev0.2: converted to use SCNA.60.tech27 removed a m1 box around the pad in cg_0 970801 rev0.1: *.cif, SCNLC.60.tech27: corrected well generation (from 6 lambda to 5 lambda overlap of diff). gnd,vdd: removed two 3x3 ndiff box "tabs" which otherwise cause superficial magic drc errors. 970715 rev0.0: 40p2200.cif 40 pin 2200x2200 um frame (io's) 40p2200.strm gds file 40p2200.mag 40p2200_ana.cif 40 pin 2200x2200 um frame (analog's) 40p2200_ana.strm gds file 40p2200_ana.mag 88p4600_4600.cif 88 pin 4600x4600 frame (io's) 88p4600_4600.strm gds file 88p4600_4600.mag analog.cif analog "io" pad analog.strm gds file analog.mag blank.cif blank pad blank.strm gds file blank.mag cg.cif corner ground pad cg.strm gds file cg.mag cv.cif corner vdd pad cv.strm gds file cv.mag gnd.cif gnd pad gnd.strm gds file gnd.mag in.cif input pad (just an io pad with ENable = gnd) in.strm gds file in.mag io.cif io pad (ENable = vdd => output; ENable = gnd => input) io.strm gds file io.mag out.cif output pad (just an io pad with ENable = vdd) out.strm gds file out.mag power.cif general power for any voltage (label it properly) power.strm gds file power.mag sim/ sample simulation of io cell under run n97n model vdd.cif vdd pad vdd.strm gds file vdd.mag here is the directory structure for the alternate directory: ftp://ftp.isi.edu/pub/sondeen/magic/new/beta/examples/SCNA.80.PADS.2000/ README cif/ location of 40p2200.cif gds/ location of 40p2200.strm (gds format) mag/ location of 40p2200.mag sim/ sample simulation of io cell spice/ *.spice files ./cif: 40p2200.cif 40p2200_ana.cif 40p2200_testpad.cif 40p2200_testpad_small.cif 88p4600_4600.cif analog.cif blank.cif cg.cif cv.cif gnd.cif in.cif io.cif out.cif power.cif vdd.cif ./gds: 40p2200.strm 40p2200_ana.strm 40p2200_testpad.strm 40p2200_testpad_small.strm 88p4600_4600.strm analog.strm blank.strm cg.strm cv.strm gnd.strm in.strm io.strm out.strm power.strm vdd.strm ./mag: 40p2200.mag 40p2200_ana.mag 40p2200_testpad.mag 40p2200_testpad_small.mag 88p4600_4600.mag analog.mag blank.mag cg.mag cv.mag ext/ gnd.mag in.mag io.mag out.mag power.mag vdd.mag ./mag/ext: 40p2200.ext 40p2200_ana.ext 40p2200_testpad.ext 40p2200_testpad_small.ext 88p4600_4600.ext analog.ext cg.ext cv.ext gnd.ext in.ext io.ext out.ext power.ext vdd.ext ./sim: MIL.log SCNA.80.r io.ext io.in.ic io.in.lis io.in.pa0 io.in.ps io.in.sp io.in.spi io.in.st0 io.in.tr0 io.out.ic io.out.lis io.out.pa0 io.out.ps io.out.sp io.out.st0 io.out.tr0 io.spice io.spice.org n97n.l13.model n97n.l3.model n97n.l49.model n97n.prm scna.80.r@ ./spice: 40p2200.spice 40p2200_ana.spice 40p2200_testpad.spice 40p2200_testpad_small.spice 88p4600_4600.spice analog.spice cg.spice cv.spice gnd.spice in.spice io.spice out.spice power.spice sim/ vdd.spice ./spice/sim: 40p2200_testpad_small.ic 40p2200_testpad_small.lis 40p2200_testpad_small.pa0 40p2200_testpad_small.ps 40p2200_testpad_small.sp 40p2200_testpad_small.spice 40p2200_testpad_small.spice.org 40p2200_testpad_small.st0 40p2200_testpad_small.tr0 MIL.log n97n.l3.model testpad.spice@ verif/ ./spice/sim/verif: drc/ ./spice/sim/verif/drc: 40p2200_testpad_small/ ./spice/sim/verif/drc/40p2200_testpad_small: DRCPF.sum