|
Date
|
Week
|
Milestone
|
|
|
|
|
|
Aug. 28
|
1
|
Group Formation
|
|
Sept. 4
|
2
|
Initial Project Idea
|
|
Sept. 4 - 6
|
2
|
Project Discussion during Office Hours
|
|
Sept. 11
|
3
|
One to Two Page Functional Description and Start
of WWW page
|
|
Sept. 11 - 13
|
3
|
Project Discussion during Office Hours
|
|
Sept. 18
|
4
|
Initial Logic and Algorithm Flow Due
|
|
Sept. 18 - 20
|
4
|
Project Discussion during Office Hours
|
|
Sept. 25
|
5
|
PLA Finite State Machine, Control and Timing
Description Due
|
|
Sept. 25 - 27
|
5
|
Project Discussion during Office Hours
|
|
Oct. 2
|
6
|
Initial Circuit Sub-Cell Layout Due
|
|
Oct. 2 - 4
|
6
|
Project Discussion during Office Hours
|
|
Oct. 9
|
7
|
Mid-Semester Project Status Report Due
|
|
Oct. 9 - 11
|
7
|
Mid-Semester Project Discussion during Office Hours
|
|
Oct. 23
|
9
|
Datapath Circuit Module
Layout Due
|
|
Oct. 23 - 25
|
9
|
Project Discussion
during Office Hours
|
|
Oct. 30
|
10
|
System Integration, Floorplan, I/O Pads Placement
Due
|
|
Nov. 8
|
11
|
Mid-Term Exam, In-Class
|
|
Nov. 13
|
12
|
System Routing, System Simulation and Verification
Plan Due
|
|
Nov. 13 - 15
|
12
|
Project Discussion during Office Hours
|
|
Nov. 27
|
14
|
Final Electrical Rules Checks and Preliminary CIF
Due
|
|
Nov. 27 - 29
|
14
|
Final Design Evaluation of Layout during Office
Hours
|
|
Dec. 6
|
15
|
Project Presentation to Class
|
|
Dec. 6
|
15
|
Final Layout CIF file, Project Report, and WWW
Page Due
|
|
Dec. 13
|
|
Final Layout CIF file Due at MOSIS
|