Welcome to the VLSI Design I class at Rice University - Fall 2001

Electrical and Computer Engineering 422 at Rice University is designed to impart to the students the theory and application of VLSI design. The course includes a design project, where students design original circuits based on the material learned in class. The chips will be fabricated by MOSIS , and tested in the next class in this series, Elec 423 (VLSI II).

Lectures: TTH 2:30 - 3:50 Duncan Hall 1070
VLSI Design Faculty:
- Joe Cavallaro Office Hours: T 4-5, Th 4-5, Duncan Hall 3042, cavallar@rice.edu.
Lab Assistants and Graders:
- Mani Vaya Office Hours: W 10-12, Duncan Hall 3039 vaya@rice.edu and
  Vikram Chandrasekhar Office Hours: T 10-12, Duncan Hall 3034. cvikram@rice.edu.
Newsgroup:
- Elec 422 Newsgroup

Third Annual AMD/Rice University VLSI Design Contest
AMD Contest Presentations and Winners - Spring 2002 - NEW -
AMD Contest Presentations and Winners - Fall 2001

Fall 2001 - Project Groups

Fall 2001 Project Groups Page

Fall 2001 - Administrative

Course Textbook, "Principles of CMOS VLSI Design," by N. H. E. Weste and K. Eshragian, 2nd Edition, ISBN 0201533766. Available through Rice Campus Store or at Amazon.com
Course Syllabus - updated 8/31/01.
Course Milestones - updated 8/31/01.
Course Project Presentation Guidelines
Course Project Report Guidelines

Fall 2001 Handouts - Design Tools and Examples

Fall 2001 - Homework Assignments

Typically five homeworks during the first 10 weeks of the semester covering these topics: Basic VLSI cell layout, Compound Gates, Static Latch Design, Finite State Machine Design and PLA Implementation, PLA Interfacing to Logic, System Timing Analysis, Other CMOS Logic Families, Approximate RC Timing Analysis, Spice Circuit Analysis.

MOSIS Run Status

The fall 2001 projects will be fabricated using both the AMI 0.5 micron CMOS process and the AMI 1.5 micron CMOS process through MOSIS generously supported by the Semiconductor Industry Association. The class projects included in the December 2001 AMI 0.5 MOSIS run T1CK are POSSUM, MNEMOSYNE, SKAN, LZW, CRAPS, FASTCPU, MUMMRA, and HUFFMAN. The class projects included in the January 2002 AMI 1.5 MOSIS run T21M are CORDIC, HAPEDAZE, MNROSC, I2CHOBUS, MAITRED, and CRACK. The class projects included in the January 2002 AMI 0.5 MOSIS run T21R are SPED.

Course Topics

The topics covered in this course include:

Overview of combinational Logic and minimization
Sequential logic and Finite State Machines
Overview of semiconductor physics
PMOS and NMOS transistors
CMOS fabrication technology (crystal growth, wafers, lithography, masks, doping, etc.)
Layout, design rules, stick diagrams
The latch-up effect, prevention, well contacts
Common structures (gates, compound gates, latches, shifters, PLA's)
Clocking strategies, 2-phase non-overlapping clock, Karplus methodology
Design Process - hierarchical design (regularity, modularity, locality)
Design verification tools (simulators, netlist comparators, DRC checkers, etc.)
MOS equations, second-order effects.
Biasing, AC and DC characteristics, load lines
Circuit parameters, parameter extraction
Timing, power, and size tradeoffs
Other CMOS structures: dynamic CMOS, pseudo NMOS, BiCMOS
Introduction to testing and testability
Analog CMOS

Sections of Course Manual - Not Complete

CAD Tool Man pages

Section 1 - cif2ps, cifplot, crystal, eqntott, esim, ext2sim, ext2spice, extcheck, fsleeper, irsim, magic, magicusage, meg, mkcp, mpla, net2ir, nutmeg, pplot, prepspice, rsleeper, sconvert, sim2spice, sleeper, spcpp, spice.
Section 3 - irsim-analyzer, mpack.
Section 5 - cmap, displays, dlys, dstyle, espresso, ext, glyphs, magic, mfbcap, mpanda, mpla, net, netchange, sim, simfile.

User contributed notes

Previous Years

About the VLSI Design class in Fall 2000, and Fall 1999, and Fall 1998, and Fall 1997, and Fall 1996, and Fall 1995

Joe Cavallaro

Last modified: 22 January 2002